Yun-Chih Chen
PhD Student
National Taiwan University
Room 438, Dept. of Computer Science & Engineering, No.1, Sec. 4, Roosevelt Road
10617 Taipei, Taiwan
Room 438, Dept. of Computer Science & Engineering, No.1, Sec. 4, Roosevelt Road
10617 Taipei, Taiwan
Bio
My research focuses on hardware/software co-design for Solid State Drives (SSDs). I’m currently working on the design of peripheral circuits within NAND flash chips that can perform bulk bitwise processing in-memory. The novel circuit will enable database indexes to take advantage of SSD’s massive parallelism and beyond-DRAM capacity.
Publications
Yun-Chih Chen,
Chun-Feng Wu,
Yuan-Hao Chang
and Tei-Wei Kuo
Optimized Ephemeral Data Storage
Optimized Ephemeral Data Storage
In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems,2022.
I propose a novel multi-ECC SSD firmware to store short-lived data with significantly less resources yet strong guarantee on data safety. Experiments show enhanced throughput and expanded endurance.
Hasan Alhasan,
Yun-Chih Chen,
and Chien-Chung Ho
SSD Power Efficiency Enhancement
SSD Power Efficiency Enhancement
In IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED),2020.
I identified energy under-utilization in conventional NAND flash programming and proposed a low-level command that recycles the wastage to enhance system parallelism. Accompanied by a scheduling framework, my design achieves industrial-grade read latency requirements, even in write-intensive workloads.
Yun-Chih Chen,
Chun-Feng Wu,
Yuan-Hao Chang
and Tei-Wei Kuo
Performant Consistent Storage Design
Performant Consistent Storage Design
In ACM/IEEE Design Automation Conference (DAC),2021.
I proposed a hardware-software co-design that exploits the inherent redundancy in journaling file-system to improves the 99th percentile read latency of ultra-dense SSD by 40%. My design overcomes several technical challenges, such as journal fragmentation, space limitation and communication of semantics.
Cite Optimized Ephemeral Data Storage
@ARTICLE{9964402,
author={Chen, Yun-Chih and Wu, Chun-Feng and Chang, Yuan-Hao and Kuo, Tei-Wei},
journal={IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems},
title={ZoneLife: How to Utilize Data Lifetime Semantics to Make SSDs Smarter},
year={2022},
volume={},
number={},
pages={1-1},
doi={10.1109/TCAD.2022.3224898}}Cite SSD Power Efficiency Enhancement
@INPROCEEDINGS{9502496,
author={Alhasan, Hasan and Chen, Yun-Chih and Ho, Chien-Chung},
booktitle={2021 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)},
title={RVO: Unleashing SSD’s Parallelism by Harnessing the Unused Power},
year={2021},
pages={1-6},
doi={10.1109/ISLPED52811.2021.9502496}}Cite Performant Consistent Storage Design
@INPROCEEDINGS{9586218,
author={Chen, Yun-Chih and Wu, Chun-Feng and Chang, Yuan-Hao and Kuo, Tei-Wei},
booktitle={2021 58th ACM/IEEE Design Automation Conference (DAC)},
title={Reptail: Cutting Storage Tail Latency with Inherent Redundancy},
year={2021},
volume={},
number={},
pages={595-600},
doi={10.1109/DAC18074.2021.9586218}}